архитектура флеш памяти

Advanced Micro Devices, Inc. (Sunnyvale, CA)

Fastow, Richard (Cupertino, CA)

A memory array includes a plurality of sets of transistors, each set including a pair of transistors in series. Each such pair of transistors is connected between a pair of adjacent bit lines. Each of the pair of transistors in each set is associated with a different one of an adjacent pair of word lines. The array is configured by providing substantially strait elongated source/drain regions in side-by-side, parallel relation. Each bit line has a zigzag configuration and connects to a pair of adjacent source/drain regions in alternating manner along the bit line length.

Flash memory array architecture having staggered metal lines

Flash memory array architecture having staggered metal lines - Advanced Micro Devices, Inc.